This commit is contained in:
zuckerberg 2021-05-08 21:05:14 -04:00
parent 413883fe36
commit f8fd84fceb
13 changed files with 8914 additions and 0 deletions

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@ -20,6 +20,10 @@
system = "x86_64-linux";
modules = [ ./machines/neet.dev/configuration.nix ];
};
"s0" = nixpkgs.lib.nixosSystem {
system = "aarch64-linux";
modules = [ ./machines/storage/s0/configuration.nix ];
};
};
};
}

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@ -0,0 +1,13 @@
{ config, pkgs, lib, ... }:
{
imports =[
./helios64.nix
../../../common/common.nix
];
nix.flakes.enable = true;
networking.hostName = "s0";
fileSystems."/" = { device = lib.mkForce "/dev/disk/by-label/bold-emmc"; fsType = lib.mkForce "btrfs"; };
networking.interfaces.eth0.useDHCP = true;
}

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@ -0,0 +1,42 @@
{ pkgs, lib, ... }:
{
# Fan speed adjustment
systemd.services.fans = {
wantedBy = ["multi-user.target"];
serviceConfig.ExecStart = pkgs.runCommandCC "fans" { nativeBuildInputs = [ pkgs.rustc ]; } ''
rustc ${./fancontrol.rs} -o $out
'';
serviceConfig.Restart = "always";
};
boot = {
kernelPackages = pkgs.linuxPackagesFor (pkgs.callPackage ./kernel.nix {});
#kernelPackages = pkgs.linuxPackages_latest;
kernelParams = ["panic=3" "boot.shell_on_fail"];
loader.grub.enable = false;
loader.generic-extlinux-compatible.enable = true;
initrd.postDeviceCommands = ''
(
cd /sys/bus/platform/drivers/sdhci-arasan
while true; do
test -e fe330000.sdhci/mmc_host/mmc*/mmc*/block && break
echo fe330000.sdhci > unbind
echo fe330000.sdhci > bind
sleep 1
done
)
'';
};
systemd.services.disable-offload = {
wantedBy = ["sys-devices-platform-fe300000.ethernet-net-eth0.device" "multi-user.targtet"];
after = ["sys-devices-platform-fe300000.ethernet-net-eth0.device"];
serviceConfig = {
Type = "oneshot";
ExecStart = "${pkgs.ethtool}/bin/ethtool --offload eth0 tx off";
Restart = "on-failure";
RestartSec = "10";
};
};
}

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@ -0,0 +1,437 @@
From 09e006cfb43e8ec38afe28278b210dab72e6cac8 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= <uwe@kleine-koenig.org>
Date: Wed, 14 Oct 2020 22:00:30 +0200
Subject: arm64: dts: rockchip: Add basic support for Kobol's Helios64
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The hardware is described in detail on Kobol's wiki at
https://wiki.kobol.io/helios64/intro/.
Up to now the following peripherals are working:
- UART
- Micro-SD card
- eMMC
- ethernet port 1
- status LED
- temperature sensor on i2c bus 2
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Link: https://lore.kernel.org/r/20201014200030.845759-3-uwe@kleine-koenig.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3399-kobol-helios64.dts | 372 +++++++++++++++++++++
2 files changed, 373 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 26661c7b736b7..28b26a874313e 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -26,6 +26,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-hugsun-x99.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-captain.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-khadas-edge-v.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-kobol-helios64.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-leez-p710.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts
new file mode 100644
index 0000000000000..2a561be724b22
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts
@@ -0,0 +1,387 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Aditya Prayoga <aditya@kobol.io>
+ */
+
+/*
+ * The Kobol Helios64 is a board designed to operate as a NAS and optionally
+ * ships with an enclosing that can host five 2.5" hard disks.
+ *
+ * See https://wiki.kobol.io/helios64/intro/ for further details.
+ */
+
+/dts-v1/;
+#include "rk3399.dtsi"
+#include "rk3399-opp.dtsi"
+
+/ {
+ model = "Kobol Helios64";
+ compatible = "kobol,helios64", "rockchip,rk3399";
+
+ avdd_1v8_s0: avdd-1v8-s0 {
+ compatible = "regulator-fixed";
+ regulator-name = "avdd_1v8_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc3v3_sys_s3>;
+ };
+
+ clkin_gmac: external-gmac-clock {
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "clkin_gmac";
+ #clock-cells = <0>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sys_grn_led_on &sys_red_led_on>;
+
+ led-0 {
+ label = "helios64:green:status";
+ gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ led-1 {
+ label = "helios64:red:fault";
+ gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
+ default-state = "keep";
+ };
+ };
+
+ vcc1v8_sys_s0: vcc1v8-sys-s0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc1v8_sys_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc1v8_sys_s3>;
+ };
+
+ vcc3v0_sd: vcc3v0-sd {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
+ regulator-name = "vcc3v0_sd";
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc0_pwr_h>;
+ vin-supply = <&vcc3v3_sys_s3>;
+ };
+
+ vcc3v3_sys_s3: vcc_lan: vcc3v3-sys-s3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_sys_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc5v0_sys: vcc5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc12v_dcin_bkup>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc12v_dcin: vcc12v-dcin {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ vcc12v_dcin_bkup: vcc12v-dcin-bkup {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin_bkup";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+};
+
+/*
+ * The system doesn't run stable with cpu freq enabled, so disallow the lower
+ * frequencies until this problem is properly understood and resolved.
+ */
+&cluster0_opp {
+ /delete-node/ opp00;
+ /delete-node/ opp01;
+ /delete-node/ opp02;
+ /delete-node/ opp03;
+ /delete-node/ opp04;
+};
+
+&cluster1_opp {
+ /delete-node/ opp00;
+ /delete-node/ opp01;
+ /delete-node/ opp02;
+ /delete-node/ opp03;
+ /delete-node/ opp04;
+ /delete-node/ opp05;
+ /delete-node/ opp06;
+};
+
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_l>;
+};
+
+&emmc_phy {
+ status = "okay";
+};
+
+&gmac {
+ assigned-clock-parents = <&clkin_gmac>;
+ assigned-clocks = <&cru SCLK_RMII_SRC>;
+ clock_in_out = "input";
+ phy-mode = "rgmii";
+ phy-supply = <&vcc_lan>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins &gphy_reset>;
+ rx_delay = <0x20>;
+ tx_delay = <0x28>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 50000>;
+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
+&i2c0 {
+ clock-frequency = <400000>;
+ i2c-scl-rising-time-ns = <168>;
+ i2c-scl-falling-time-ns = <4>;
+ status = "okay";
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ reg = <0x1b>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
+ clock-output-names = "xin32k", "rk808-clkout2";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l>;
+ vcc1-supply = <&vcc5v0_sys>;
+ vcc2-supply = <&vcc5v0_sys>;
+ vcc3-supply = <&vcc5v0_sys>;
+ vcc4-supply = <&vcc5v0_sys>;
+ vcc6-supply = <&vcc5v0_sys>;
+ vcc7-supply = <&vcc5v0_sys>;
+ vcc8-supply = <&vcc3v3_sys_s3>;
+ vcc9-supply = <&vcc5v0_sys>;
+ vcc10-supply = <&vcc5v0_sys>;
+ vcc11-supply = <&vcc5v0_sys>;
+ vcc12-supply = <&vcc3v3_sys_s3>;
+ vddio-supply = <&vcc3v0_s3>;
+ wakeup-source;
+ #clock-cells = <1>;
+
+ regulators {
+ vdd_cpu_l: DCDC_REG2 {
+ regulator-name = "vdd_cpu_l";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <6001>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc1v8_sys_s3: DCDC_REG4 {
+ regulator-name = "vcc1v8_sys_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vcc_sdio_s0: LDO_REG4 {
+ regulator-name = "vcc_sdio_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+
+ vcc3v0_s3: LDO_REG8 {
+ regulator-name = "vcc3v0_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3000000>;
+ };
+ };
+ };
+ };
+
+ vdd_cpu_b: regulator@40 {
+ compatible = "silergy,syr827";
+ reg = <0x40>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_b";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1500000>;
+ regulator-ramp-delay = <1000>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
+&i2c2 {
+ clock-frequency = <400000>;
+ i2c-scl-rising-time-ns = <160>;
+ i2c-scl-falling-time-ns = <30>;
+ status = "okay";
+
+ temp@4c {
+ compatible = "national,lm75";
+ reg = <0x4c>;
+ };
+};
+
+&io_domains {
+ audio-supply = <&vcc1v8_sys_s0>;
+ bt656-supply = <&vcc1v8_sys_s0>;
+ gpio1830-supply = <&vcc3v0_s3>;
+ sdmmc-supply = <&vcc_sdio_s0>;
+ status = "okay";
+};
+
+&pcie0 {
+ num-lanes = <2>;
+ max-link-speed = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_prst &pcie_clkreqn_cpm>;
+ vpcie12v-supply = <&vcc12v_dcin>;
+ vpcie3v3-supply = <&pcie_power>;
+ vpcie1v8-supply = <&avdd_1v8_s0>;
+ vpcie0v9-supply = <&avdd_0v9_s0>;
+ status = "okay";
+};
+
+&pcie_phy {
+ status = "okay";
+};
+
+&pinctrl {
+ gmac {
+ gphy_reset: gphy-reset {
+ rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_output_low>;
+ };
+ };
+
+ leds {
+ sys_grn_led_on: sys-grn-led-on {
+ rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ sys_red_led_on: sys-red-led-on {
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+
+ pmic {
+ pmic_int_l: pmic-int-l {
+ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ vcc3v0-sd {
+ sdmmc0_pwr_h: sdmmc0-pwr-h {
+ rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
+&pmu_io_domains {
+ pmu1830-supply = <&vcc3v0_s3>;
+ status = "okay";
+};
+
+&sdhci {
+ bus-width = <8>;
+ mmc-hs200-1_8v;
+ non-removable;
+ vqmmc-supply = <&vcc1v8_sys_s0>;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
+ vmmc-supply = <&vcc3v0_sd>;
+ vqmmc-supply = <&vcc_sdio_s0>;
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
--
cgit 1.2.3-1.el7

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@ -0,0 +1,14 @@
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts
index 714616618..b1fb824f3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts
@@ -16,6 +16,11 @@
compatible = "kobol,helios64", "rockchip,rk3399";
+ chosen {
+ bootargs = "earlycon=uart8250,mmio32,0xff1a0000 earlyprintk";
+ stdout-path = "serial2:115200n8";
+ };
+
adc-keys {
compatible = "adc-keys";

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@ -0,0 +1,38 @@
From 62dbf80fc581a8eed7288ed7aca24446054eb616 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= <uwe@kleine-koenig.org>
Date: Mon, 2 Nov 2020 16:06:58 +0100
Subject: dt-bindings: arm: rockchip: Add Kobol Helios64
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Document the new board by Kobol introduced recently in
rockchip/rk3399-kobol-helios64.dts.
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201102150658.167161-1-uwe@kleine-koenig.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 65b4cc2c63f7c..70fa4d98db564 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -381,6 +381,11 @@ properties:
- khadas,edge-v
- const: rockchip,rk3399
+ - description: Kobol Helios64
+ items:
+ - const: kobol,helios64
+ - const: rockchip,rk3399
+
- description: Mecer Xtreme Mini S6
items:
- const: mecer,xms6
--
cgit 1.2.3-1.el7

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@ -0,0 +1,34 @@
From fa67f2817ff2c9bb07472d30e58d904922f1a538 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= <uwe@kleine-koenig.org>
Date: Wed, 14 Oct 2020 22:00:29 +0200
Subject: dt-bindings: vendor-prefixes: Add kobol prefix
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The prefix is already used in arm/armada-388-helios4.dts.
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201014200030.845759-2-uwe@kleine-koenig.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 2735be1a84709..259faf1b382c0 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -553,6 +553,8 @@ patternProperties:
description: Kionix, Inc.
"^kobo,.*":
description: Rakuten Kobo Inc.
+ "^kobol,.*":
+ description: Kobol Innovations Pte. Ltd.
"^koe,.*":
description: Kaohsiung Opto-Electronics Inc.
"^kontron,.*":
--
cgit 1.2.3-1.el7

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@ -0,0 +1,25 @@
From e7e9a3a959927094d59b67f46ecc1c5d50190ce8 Mon Sep 17 00:00:00 2001
From: Aditya Prayoga <aditya@kobol.io>
Date: Tue, 15 Sep 2020 13:42:02 +0700
Subject: [PATCH] Remove PCIE ep-gpios from Helios64
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
---
arch/arm64/boot/dts/rockchip/rk3399-helios64.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts
index c065ba82d..002c93912 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts
@@ -721,7 +721,6 @@
};
&pcie0 {
- ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
num-lanes = <2>;
max-link-speed = <2>;
pinctrl-names = "default";
--
Created with Armbian build tools https://github.com/armbian/build

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@ -0,0 +1,29 @@
From 002593cfe8fc7539a6aa2dfb246d832e0b8b8516 Mon Sep 17 00:00:00 2001
From: Aditya Prayoga <aditya@kobol.io>
Date: Tue, 15 Sep 2020 13:29:45 +0700
Subject: [PATCH] PCI: rockchip: support ep-gpio undefined case
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
---
drivers/pci/controller/pcie-rockchip.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c
index c53d1322a..e4f42591d 100644
--- a/drivers/pci/controller/pcie-rockchip.c
+++ b/drivers/pci/controller/pcie-rockchip.c
@@ -119,9 +119,9 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
}
if (rockchip->is_rc) {
- rockchip->ep_gpio = devm_gpiod_get(dev, "ep", GPIOD_OUT_HIGH);
+ rockchip->ep_gpio = devm_gpiod_get_optional(dev, "ep", GPIOD_OUT_HIGH);
if (IS_ERR(rockchip->ep_gpio)) {
- dev_err(dev, "missing ep-gpios property in node\n");
+ dev_err(dev, "invalid ep-gpios property in node\n");
return PTR_ERR(rockchip->ep_gpio);
}
}
--
Created with Armbian build tools https://github.com/armbian/build

View File

@ -0,0 +1,21 @@
From efb3ec2ca3a88530d45c593f051ec53f80a4c4d8 Mon Sep 17 00:00:00 2001
From: Moritz Angermann <moritz.angermann@gmail.com>
Date: Fri, 4 Dec 2020 17:00:03 +0800
Subject: [PATCH] Update rk3399-helios64-u-boot.dtsi
---
arch/arm/dts/rk3399-kobol-helios64-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3399-kobol-helios64-u-boot.dtsi b/arch/arm/dts/rk3399-kobol-helios64-u-boot.dtsi
index 27ea5eaa971..3a260c7e126 100644
--- a/arch/arm/dts/rk3399-kobol-helios64-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-kobol-helios64-u-boot.dtsi
@@ -16,7 +16,7 @@
chosen {
bootargs = "earlycon=uart8250,mmio32,0xff1a0000 earlyprintk";
- stdout-path = "serial2:1500000n8";
+ stdout-path = "serial2:115200n8";
u-boot,spl-boot-order = "same-as-spl", &spiflash, &sdmmc, &sdhci;
};

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