From 0c548275fb78bfec29e4d965004f7332782d994f Mon Sep 17 00:00:00 2001 From: Daniel Fullmer Date: Sun, 18 Oct 2020 12:44:21 -0700 Subject: [PATCH] Initial commit --- 0001-WIP-Initial-support-for-pinecube.patch | 158 ++++++ LICENSE | 20 + Pine64-PineCube-support.patch | 600 ++++++++++++++++++++ README.md | 51 ++ build.sh | 6 + configuration.nix | 86 +++ 6 files changed, 921 insertions(+) create mode 100644 0001-WIP-Initial-support-for-pinecube.patch create mode 100644 LICENSE create mode 100644 Pine64-PineCube-support.patch create mode 100644 README.md create mode 100755 build.sh create mode 100644 configuration.nix diff --git a/0001-WIP-Initial-support-for-pinecube.patch b/0001-WIP-Initial-support-for-pinecube.patch new file mode 100644 index 0000000..6ecf955 --- /dev/null +++ b/0001-WIP-Initial-support-for-pinecube.patch @@ -0,0 +1,158 @@ +From 9c657a26092f58815a7f68ede0bb6ef53bc0b5da Mon Sep 17 00:00:00 2001 +From: Daniel Fullmer +Date: Sat, 17 Oct 2020 13:05:16 -0700 +Subject: [PATCH] WIP Initial support for pinecube + +--- + arch/arm/dts/Makefile | 3 +- + arch/arm/dts/sun8i-s3-pinecube.dts | 84 ++++++++++++++++++++++++++++++ + arch/arm/mach-sunxi/Kconfig | 4 +- + configs/pinecube_defconfig | 12 +++++ + 4 files changed, 99 insertions(+), 4 deletions(-) + create mode 100644 arch/arm/dts/sun8i-s3-pinecube.dts + create mode 100644 configs/pinecube_defconfig + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 9900b44274..74cee045e6 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -563,7 +563,8 @@ dtb-$(CONFIG_MACH_SUN8I_R40) += \ + sun8i-r40-bananapi-m2-ultra.dtb \ + sun8i-v40-bananapi-m2-berry.dtb + dtb-$(CONFIG_MACH_SUN8I_V3S) += \ +- sun8i-v3s-licheepi-zero.dtb ++ sun8i-v3s-licheepi-zero.dtb \ ++ sun8i-s3-pinecube.dtb + dtb-$(CONFIG_MACH_SUN50I_H5) += \ + sun50i-h5-bananapi-m2-plus.dtb \ + sun50i-h5-emlid-neutis-n5-devboard.dtb \ +diff --git a/arch/arm/dts/sun8i-s3-pinecube.dts b/arch/arm/dts/sun8i-s3-pinecube.dts +new file mode 100644 +index 0000000000..d686b81894 +--- /dev/null ++++ b/arch/arm/dts/sun8i-s3-pinecube.dts +@@ -0,0 +1,84 @@ ++/* ++ * Copyright (C) 2020 Daniel Fullmer ++ * Copyright (C) 2016 Icenowy Zheng ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "sun8i-v3s.dtsi" ++#include "sunxi-common-regulators.dtsi" ++ ++/ { ++ model = "Pine64 Pinecube"; ++ compatible = "pine64,pinecube", "allwinner,sun8i-s3"; ++ ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++}; ++ ++&mmc0 { ++ pinctrl-0 = <&mmc0_pins_a>; ++ pinctrl-names = "default"; ++ broken-cd; ++ bus-width = <4>; ++ vmmc-supply = <®_vcc3v3>; ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-0 = <&uart0_pins_a>; ++ pinctrl-names = "default"; ++ status = "okay"; ++}; ++ ++&usb_otg { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&usbphy { ++ usb0_id_det-gpio = <&pio 5 6 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++}; +diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig +index be0822bfb7..2257ef6eb1 100644 +--- a/arch/arm/mach-sunxi/Kconfig ++++ b/arch/arm/mach-sunxi/Kconfig +@@ -357,13 +357,11 @@ config SUNXI_DRAM_LPDDR3 + + choice + prompt "DRAM Type and Timing" +- default SUNXI_DRAM_DDR3_1333 if !MACH_SUN8I_V3S +- default SUNXI_DRAM_DDR2_V3S if MACH_SUN8I_V3S ++ default SUNXI_DRAM_DDR3_1333 + + config SUNXI_DRAM_DDR3_1333 + bool "DDR3 1333" + select SUNXI_DRAM_DDR3 +- depends on !MACH_SUN8I_V3S + ---help--- + This option is the original only supported memory type, which suits + many H3/H5/A64 boards available now. +diff --git a/configs/pinecube_defconfig b/configs/pinecube_defconfig +new file mode 100644 +index 0000000000..361c187f12 +--- /dev/null ++++ b/configs/pinecube_defconfig +@@ -0,0 +1,12 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_SUNXI=y ++CONFIG_SPL=y ++CONFIG_MACH_SUN8I_V3S=y ++CONFIG_DRAM_CLK=360 ++CONFIG_DEFAULT_DEVICE_TREE="sun8i-s3-pinecube" ++# CONFIG_NETDEVICES is not set ++ ++# S3 uses DDR3 ++CONFIG_SUNXI_DRAM_DDR3_133=y ++CONFIG_SUNXI_DRAM_DDR2=n ++CONFIG_SUNXI_DRAM_DDR2_V3S=n +-- +2.28.0 + diff --git a/LICENSE b/LICENSE new file mode 100644 index 0000000..cb0606f --- /dev/null +++ b/LICENSE @@ -0,0 +1,20 @@ +Copyright (c) 2020 Daniel Fullmer + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. + diff --git a/Pine64-PineCube-support.patch b/Pine64-PineCube-support.patch new file mode 100644 index 0000000..201c622 --- /dev/null +++ b/Pine64-PineCube-support.patch @@ -0,0 +1,600 @@ +From 17bd28ff69e61f881d54cf4c606c04b55a43d478 Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Wed, 23 Sep 2020 08:57:03 +0800 +Subject: [PATCH 1/7] ARM: dts: sun8i: V3/V3s/S3/S3L: add Ethernet support + +The Allwinner V3/V3s/S3L/SoChip S3 Ethernet MAC and internal PHY is quite +similar to the ones on Allwinner H3, except for V3s the external MII is +not wired out. + +Add ethernet support to V3/V3s/S3/S3L. + +Signed-off-by: Icenowy Zheng +--- + arch/arm/boot/dts/sun8i-v3.dtsi | 13 ++++++++ + arch/arm/boot/dts/sun8i-v3s.dtsi | 52 ++++++++++++++++++++++++++++++++ + 2 files changed, 65 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-v3.dtsi b/arch/arm/boot/dts/sun8i-v3.dtsi +index 6ae8645ade50..ca4672ed2e02 100644 +--- a/arch/arm/boot/dts/sun8i-v3.dtsi ++++ b/arch/arm/boot/dts/sun8i-v3.dtsi +@@ -9,6 +9,19 @@ &ccu { + compatible = "allwinner,sun8i-v3-ccu"; + }; + ++&emac { ++ /delete-property/ phy-handle; ++ /delete-property/ phy-mode; ++}; ++ ++&mdio_mux { ++ external_mdio: mdio@2 { ++ reg = <2>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++}; ++ + &pio { + compatible = "allwinner,sun8i-v3-pinctrl"; + }; +diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi +index e5312869c0d2..b4069df84d10 100644 +--- a/arch/arm/boot/dts/sun8i-v3s.dtsi ++++ b/arch/arm/boot/dts/sun8i-v3s.dtsi +@@ -138,6 +138,15 @@ mixer0_out_tcon0: endpoint { + }; + }; + ++ syscon: system-control@1c00000 { ++ compatible = "allwinner,sun8i-v3s-system-control", ++ "allwinner,sun8i-h3-system-control"; ++ reg = <0x01c00000 0x1000>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ }; ++ + tcon0: lcd-controller@1c0c000 { + compatible = "allwinner,sun8i-v3s-tcon"; + reg = <0x01c0c000 0x1000>; +@@ -404,6 +413,49 @@ i2c1: i2c@1c2b000 { + #size-cells = <0>; + }; + ++ emac: ethernet@1c30000 { ++ compatible = "allwinner,sun8i-v3s-emac"; ++ syscon = <&syscon>; ++ reg = <0x01c30000 0x10000>; ++ interrupts = ; ++ interrupt-names = "macirq"; ++ resets = <&ccu RST_BUS_EMAC>; ++ reset-names = "stmmaceth"; ++ clocks = <&ccu CLK_BUS_EMAC>; ++ clock-names = "stmmaceth"; ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ status = "disabled"; ++ ++ mdio: mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "snps,dwmac-mdio"; ++ }; ++ ++ mdio_mux: mdio-mux { ++ compatible = "allwinner,sun8i-h3-mdio-mux"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mdio-parent-bus = <&mdio>; ++ /* Only one MDIO is usable at the time */ ++ internal_mdio: mdio@1 { ++ compatible = "allwinner,sun8i-h3-mdio-internal"; ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ int_mii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; ++ }; ++ }; ++ }; ++ }; ++ + spi0: spi@1c68000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c68000 0x1000>; +-- +2.28.0 + + +From c3e603b4fb67bcc5da7361c46c11f6101835d54c Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Wed, 23 Sep 2020 08:58:53 +0800 +Subject: [PATCH 2/7] ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for UART2 + RX/TX + +The UART2 RX/TX pins on Allwinner V3 series is at PB0/1, which is used +as debugging UART on some boards. + +Add pinctrl node for them. + +Signed-off-by: Icenowy Zheng +--- + arch/arm/boot/dts/sun8i-v3s.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi +index b4069df84d10..3932d227ac1c 100644 +--- a/arch/arm/boot/dts/sun8i-v3s.dtsi ++++ b/arch/arm/boot/dts/sun8i-v3s.dtsi +@@ -311,6 +311,11 @@ uart0_pb_pins: uart0-pb-pins { + function = "uart0"; + }; + ++ uart2_pins: uart2-pins { ++ pins = "PB0", "PB1"; ++ function = "uart2"; ++ }; ++ + mmc0_pins: mmc0-pins { + pins = "PF0", "PF1", "PF2", "PF3", + "PF4", "PF5"; +@@ -386,6 +391,8 @@ uart2: serial@1c28800 { + reg-io-width = <4>; + clocks = <&ccu CLK_BUS_UART2>; + resets = <&ccu RST_BUS_UART2>; ++ pinctrl-0 = <&uart2_pins>; ++ pinctrl-names = "default"; + status = "disabled"; + }; + +-- +2.28.0 + + +From ada1e0b448d8fd71eac999adbc3a179c0395002a Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Wed, 23 Sep 2020 08:58:54 +0800 +Subject: [PATCH 3/7] ARM: dts: sun8i: V3/V3s/S3/S3L: add CSI1 device node + +The CSI1 controller of V3/V3s/S3/S3L chips is used for parallel CSI. + +Add the device tree node of it. + +Signed-off-by: Icenowy Zheng +--- + arch/arm/boot/dts/sun8i-v3s.dtsi | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi +index 3932d227ac1c..f221018d7cf3 100644 +--- a/arch/arm/boot/dts/sun8i-v3s.dtsi ++++ b/arch/arm/boot/dts/sun8i-v3s.dtsi +@@ -477,6 +477,18 @@ spi0: spi@1c68000 { + #size-cells = <0>; + }; + ++ csi1: camera@1cb4000 { ++ compatible = "allwinner,sun8i-v3s-csi"; ++ reg = <0x01cb4000 0x3000>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_CSI>, ++ <&ccu CLK_CSI1_SCLK>, ++ <&ccu CLK_DRAM_CSI>; ++ clock-names = "bus", "mod", "ram"; ++ resets = <&ccu RST_BUS_CSI>; ++ status = "disabled"; ++ }; ++ + gic: interrupt-controller@1c81000 { + compatible = "arm,gic-400"; + reg = <0x01c81000 0x1000>, +-- +2.28.0 + + +From 48cf51ab9126ea032f464157b2cf2a40f9a49be4 Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Wed, 23 Sep 2020 09:00:11 +0800 +Subject: [PATCH 4/7] ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for 8-bit + parallel CSI + +The CSI1 controller of V3/V3s/S3/S3L SoCs is used for parallel CSI. + +As we're going to add support for Pine64 SCC board, which uses 8-bit +parallel CSI (and the MCLK output), add the pinctrl node of 8-bit +CSI and MCLK to the DTSI file. + +Signed-off-by: Icenowy Zheng +--- + arch/arm/boot/dts/sun8i-v3s.dtsi | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi +index f221018d7cf3..2727756bcd91 100644 +--- a/arch/arm/boot/dts/sun8i-v3s.dtsi ++++ b/arch/arm/boot/dts/sun8i-v3s.dtsi +@@ -301,6 +301,20 @@ pio: pinctrl@1c20800 { + interrupt-controller; + #interrupt-cells = <3>; + ++ /omit-if-no-ref/ ++ csi1_8bit_pins: csi1-8bit-pins { ++ pins = "PE0", "PE2", "PE3", "PE8", "PE9", ++ "PE10", "PE11", "PE12", "PE13", "PE14", ++ "PE15"; ++ function = "csi"; ++ }; ++ ++ /omit-if-no-ref/ ++ csi1_mclk_pin: csi1-mclk-pin { ++ pins = "PE1"; ++ function = "csi"; ++ }; ++ + i2c0_pins: i2c0-pins { + pins = "PB6", "PB7"; + function = "i2c0"; +-- +2.28.0 + + +From e7b7e35f417676ac1e692730c16ab50f9d6e4da4 Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Wed, 23 Sep 2020 09:00:12 +0800 +Subject: [PATCH 5/7] ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for I2C1 at + PE bank + +I2C1 controller is available at PE bank, usually used for +connecting an I2C-controlled camera sensor. + +Add pinctrl node for it. + +Signed-off-by: Icenowy Zheng +--- + arch/arm/boot/dts/sun8i-v3s.dtsi | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi +index 2727756bcd91..3cd3b58c2587 100644 +--- a/arch/arm/boot/dts/sun8i-v3s.dtsi ++++ b/arch/arm/boot/dts/sun8i-v3s.dtsi +@@ -320,6 +320,12 @@ i2c0_pins: i2c0-pins { + function = "i2c0"; + }; + ++ /omit-if-no-ref/ ++ i2c1_pe_pins: i2c1-pe-pins { ++ pins = "PE21", "PE22"; ++ function = "i2c1"; ++ }; ++ + uart0_pb_pins: uart0-pb-pins { + pins = "PB8", "PB9"; + function = "uart0"; +-- +2.28.0 + + +From 0ae37e2d02098a198f3d149b2e36b8e862a121ee Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Wed, 23 Sep 2020 09:02:14 +0800 +Subject: [PATCH 6/7] dt-bindings: arm: sunxi: add Pine64 PineCube binding + +Document board compatible names for Pine64 PineCube IP camera. + +Signed-off-by: Icenowy Zheng +--- + Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml +index efc9118233b4..ba4a380ba4a3 100644 +--- a/Documentation/devicetree/bindings/arm/sunxi.yaml ++++ b/Documentation/devicetree/bindings/arm/sunxi.yaml +@@ -626,6 +626,11 @@ properties: + - const: pine64,pine64-plus + - const: allwinner,sun50i-a64 + ++ - description: Pine64 PineCube ++ items: ++ - const: pine64,pinecube ++ - const: allwinner,sun8i-v3 ++ + - description: Pine64 PineH64 model A + items: + - const: pine64,pine-h64 +-- +2.28.0 + + +From 6dca04137361a821df34ef83b6f34fd1aa9fbb73 Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Wed, 23 Sep 2020 09:02:15 +0800 +Subject: [PATCH 7/7] ARM: dts: sun8i: s3l: add support for Pine64 PineCube IP + camera + +The Pine64 PineCube IP camera is an IP camera with SoChip S3 SoC. + +It comes with a main board, an expansion board and a camera. + +The main board features a Micro-USB power-only jack, a USB Type-A port, +an Ethernet port connected to the internal PHY of the SoC and a Realtek +RTL8189ES SDIO Wi-Fi module. A RGB LCD connector is reserved on the +board. + +The expansion board features a TF slot, a microphone, a speaker +connector with on-board amplifier and a few IR LEDs. + +Add support for the kit, with features on the main board and the +expansion board now. + +Signed-off-by: Icenowy Zheng +--- + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/sun8i-s3-pinecube.dts | 235 ++++++++++++++++++++++++ + 2 files changed, 236 insertions(+) + create mode 100644 arch/arm/boot/dts/sun8i-s3-pinecube.dts + +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index 4572db3fa5ae..4363ba564bb4 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -1194,6 +1194,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ + sun8i-r16-parrot.dtb \ + sun8i-r40-bananapi-m2-ultra.dtb \ + sun8i-s3-lichee-zero-plus.dtb \ ++ sun8i-s3-pinecube.dtb \ + sun8i-t3-cqa3t-bv3.dtb \ + sun8i-v3s-licheepi-zero.dtb \ + sun8i-v3s-licheepi-zero-dock.dtb \ +diff --git a/arch/arm/boot/dts/sun8i-s3-pinecube.dts b/arch/arm/boot/dts/sun8i-s3-pinecube.dts +new file mode 100644 +index 000000000000..9bab6b7f4014 +--- /dev/null ++++ b/arch/arm/boot/dts/sun8i-s3-pinecube.dts +@@ -0,0 +1,235 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR X11) ++/* ++ * Copyright 2019 Icenowy Zheng ++ */ ++ ++/dts-v1/; ++#include "sun8i-v3.dtsi" ++#include ++#include ++ ++/ { ++ model = "PineCube IP Camera"; ++ compatible = "pine64,pinecube", "allwinner,sun8i-s3"; ++ ++ aliases { ++ serial0 = &uart2; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led1 { ++ label = "pine64:ir:led1"; ++ gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; /* PB10 */ ++ }; ++ ++ led2 { ++ label = "pine64:ir:led2"; ++ gpios = <&pio 1 12 GPIO_ACTIVE_LOW>; /* PB12 */ ++ }; ++ }; ++ ++ reg_vcc5v0: vcc5v0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ reg_vcc_wifi: vcc-wifi { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc-wifi"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&pio 1 2 GPIO_ACTIVE_LOW>; /* PB2 WIFI-EN */ ++ vin-supply = <®_dcdc3>; ++ startup-delay-us = <200000>; ++ }; ++ ++ wifi_pwrseq: wifi_pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&pio 1 3 GPIO_ACTIVE_LOW>; /* PB3 WIFI-RST */ ++ post-power-on-delay-ms = <200>; ++ }; ++}; ++ ++&csi1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&csi1_8bit_pins>; ++ status = "okay"; ++ ++ port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ csi1_ep: endpoint { ++ remote-endpoint = <&ov5640_ep>; ++ bus-width = <8>; ++ hsync-active = <1>; /* Active high */ ++ vsync-active = <0>; /* Active low */ ++ data-active = <1>; /* Active high */ ++ pclk-sample = <1>; /* Rising */ ++ }; ++ }; ++}; ++ ++&emac { ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ axp209: pmic@34 { ++ compatible = "x-powers,axp203", ++ "x-powers,axp209"; ++ reg = <0x34>; ++ interrupt-parent = <&gic>; ++ interrupts = ; ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ }; ++}; ++ ++&i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1_pe_pins>; ++ status = "okay"; ++ ++ ov5640: camera@3c { ++ compatible = "ovti,ov5640"; ++ reg = <0x3c>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&csi1_mclk_pin>; ++ clocks = <&ccu CLK_CSI1_MCLK>; ++ clock-names = "xclk"; ++ ++ AVDD-supply = <®_ldo3>; ++ DOVDD-supply = <®_ldo3>; ++ DVDD-supply = <®_ldo4>; ++ reset-gpios = <&pio 4 23 GPIO_ACTIVE_LOW>; /* PE23 */ ++ powerdown-gpios = <&pio 4 24 GPIO_ACTIVE_HIGH>; /* PE24 */ ++ ++ port { ++ ov5640_ep: endpoint { ++ remote-endpoint = <&csi1_ep>; ++ bus-width = <8>; ++ hsync-active = <1>; /* Active high */ ++ vsync-active = <0>; /* Active low */ ++ data-active = <1>; /* Active high */ ++ pclk-sample = <1>; /* Rising */ ++ }; ++ }; ++ }; ++}; ++ ++&lradc { ++ vref-supply = <®_ldo2>; ++ status = "okay"; ++ ++ button-200 { ++ label = "Setup"; ++ linux,code = ; ++ channel = <0>; ++ voltage = <190000>; ++ }; ++}; ++ ++&mmc0 { ++ vmmc-supply = <®_dcdc3>; ++ bus-width = <4>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; ++ status = "okay"; ++}; ++ ++&mmc1 { ++ vmmc-supply = <®_vcc_wifi>; ++ vqmmc-supply = <®_dcdc3>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++}; ++ ++&pio { ++ vcc-pd-supply = <®_dcdc3>; ++ vcc-pe-supply = <®_ldo3>; ++}; ++ ++#include "axp209.dtsi" ++ ++&ac_power_supply { ++ status = "okay"; ++}; ++ ++®_dcdc2 { ++ regulator-always-on; ++ regulator-min-microvolt = <1250000>; ++ regulator-max-microvolt = <1250000>; ++ regulator-name = "vdd-sys-cpu-ephy"; ++}; ++ ++®_dcdc3 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc-3v3"; ++}; ++ ++®_ldo1 { ++ regulator-name = "vdd-rtc"; ++}; ++ ++®_ldo2 { ++ regulator-always-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-name = "avcc"; ++}; ++ ++®_ldo3 { ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ regulator-name = "avdd-dovdd-2v8-csi"; ++ regulator-soft-start; ++ regulator-ramp-delay = <1600>; ++}; ++ ++®_ldo4 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "dvdd-1v8-csi"; ++}; ++ ++&spi0 { ++ status = "okay"; ++ ++ flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "winbond,w25q128", "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <40000000>; ++ }; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb_otg { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usbphy { ++ usb0_vbus-supply = <®_vcc5v0>; ++ status = "okay"; ++}; +-- +2.28.0 + diff --git a/README.md b/README.md new file mode 100644 index 0000000..0eb9f45 --- /dev/null +++ b/README.md @@ -0,0 +1,51 @@ +# NixOS on Pinecube (Early work in progress) + +Build an SD card image with `./build.sh`. +Prebuilt image [here]() (updated 2020-10-18) +Decompress and flash with: +```shell +$ zstd -d result/sd-image/nixos-sd-image-21.03pre-git-armv7l-linux.img.zst -o nixos-pinecube.img +$ dd if=./nixos-pinecube.img of=/dev/ bs=1024 +``` + +Should be accessible over UART2 pins (see pinout on wiki) or SSH. +- Username: `nixos` +- Password: `nixos` + +# Additional Notes + +## Recording from CSI camera: + - https://linux-sunxi.org/CSI#CSI_on_mainline_Linux_with_v4l2 + - https://www.kernel.org/doc/html/latest/userspace-api/media/v4l/subdev-formats.html +```shell +$ media-ctl --set-v4l2 '"ov5640 1-003c":0[fmt:YUYV8_2X8/640x480]' +$ ffmpeg -s 640x480 -r 10 -i /dev/video0 -vcodec libx264 -preset ultrafast -tune zerolatency -f flv rtmp://192.168.1.200/live/pinecube +``` + +## Activating LEDs: +https://elinux.org/CI20_GPIO_LED_Blink_Tutorial#Controlling_GPIOs_from_the_shell_.28Linux.27_sysfs_interface_for_GPIOs.29 +```shell +$ echo 1 > /sys/class/leds/pine64\:ir\:led1/brightness +``` +(Except they seem to be reversed. Setting 0 brightness turns them on, setting 1 turns them off) +Change it to `ACTIVE_HIGH` in dtb? + +## GPIO: +https://linux-sunxi.org/GPIO +```shell +$ cat /sys/kernel/debug/pinctrl/1c20800.pinctrl/pinmux-pins +``` +gives information about pin numbering and what pins already claimed for other things + +Audio is not in currently in DTB at all. +Maybe use sun7i-a20 as example. It has a "codec" block. +See the S3 manual, grep for I2S/PCM. + +## SPI NOR +dmesg error: `spi-nor spi0.0: unrecognized JEDEC id bytes: 0b 40 18 0b 40 18` + +## WIFI +Not working + +## Ethernet +Working fine in linux. U-boot needs support diff --git a/build.sh b/build.sh new file mode 100755 index 0000000..ad28282 --- /dev/null +++ b/build.sh @@ -0,0 +1,6 @@ +#!/usr/bin/env bash + +nix-build "" \ + -I nixpkgs=https://github.com/danielfullmer/nixpkgs/archive/409e2f8cf43ba86b1de710308ca0e9aa29d5fc60.tar.gz \ + -I nixos-config=./configuration.nix \ + -A config.system.build.sdImage diff --git a/configuration.nix b/configuration.nix new file mode 100644 index 0000000..93213ff --- /dev/null +++ b/configuration.nix @@ -0,0 +1,86 @@ +{ config, lib, pkgs, ... }: + +let + uboot = pkgs.buildUBoot { + patches = [ ./0001-WIP-Initial-support-for-pinecube.patch ]; + + defconfig = "pinecube_defconfig"; + extraMeta.platforms = ["armv7l-linux"]; + filesToInstall = ["u-boot-sunxi-with-spl.bin"]; + }; +in +{ + imports = [ ]; + + nixpkgs.crossSystem = lib.recursiveUpdate lib.systems.examples.armv7l-hf-multiplatform { + platform = { + name = "pinecube"; + kernelBaseConfig = "sunxi_defconfig"; + }; + }; + + boot.loader.grub.enable = false; + boot.loader.generic-extlinux-compatible.enable = true; + boot.consoleLogLevel = 7; + + # cma is 64M by default which is waay too much and we can't even unpack initrd + boot.kernelParams = [ "console=ttyS0,115200n8" "cma=32M" ]; + + sdImage.populateFirmwareCommands = ""; + sdImage.populateRootCommands = '' + mkdir -p ./files/boot + ${config.boot.loader.generic-extlinux-compatible.populateCmd} -c ${config.system.build.toplevel} -d ./files/boot + ''; + sdImage.postBuildCommands = '' + dd if=${uboot}/u-boot-sunxi-with-spl.bin of=$img bs=1024 seek=8 conv=notrunc + ''; + + # See: https://lore.kernel.org/patchwork/project/lkml/list/?submitter=22013&order=name + boot.kernelPackages = pkgs.linuxPackages_5_9; + boot.kernelPatches = [ + { name = "pine64-pinecube"; patch = ./Pine64-PineCube-support.patch; } + ]; + + environment.systemPackages = with pkgs; [ + alsaUtils + ffmpeg + (v4l_utils.override { withGUI = false; }) + ]; + + ### + + services.openssh.enable = true; + services.openssh.permitRootLogin = "yes"; + users.users.root.initialPassword = "nixos"; # Log in without a password + + users.users.nixos = { + isNormalUser = true; + extraGroups = [ "wheel" "networkmanager" "video" ]; + initialPassword = "nixos"; + }; + services.mingetty.autologinUser = "nixos"; + + networking.wireless.enable = true; + + ### + + + nixpkgs.overlays = [ (self: super: { + # Dependency minimization for cross-compiling + cairo = super.cairo.override { glSupport = false; }; + libass = super.libass.override { encaSupport = false; }; + gnutls = super.gnutls.override { guileBindings = false; }; + polkit = super.polkit.override { withIntrospection = false; }; + }) ]; + + # disable more stuff to minimize cross-compilation + # some from: https://github.com/illegalprime/nixos-on-arm/blob/master/images/mini/default.nix + environment.noXlibs = true; + documentation.info.enable = false; + documentation.man.enable = false; + programs.command-not-found.enable = false; + security.polkit.enable = false; + security.audit.enable = false; + services.udisks2.enable = false; + boot.enableContainers = false; +}